1. Field of the Invention
The present invention relates to an image processing apparatus, and, more particularly, to an image processing apparatus having a means capable of storing image information of a mixture of half-tone images, photographs possessing gradation (color included), characters possessing high resolution and line pictures.
2. Related Background Art
The storage capacity of a memory to store a half-tone image such as a photograph in the memory is (number of pixels).times.(number of gradation bits).times.(number of colors). In particular, a great storage capacity is necessary to store a high grade color image. Therefore, a variety of methods of compressing the quantity of information have been disclosed in order to reduce the required quantity of the memory before it is stored in the memory.
FIG. 5 is a block diagram which illustrates an ordinary method of storing a compressed image. An image described in PDL (Page Description Language), for example, PS (Postscript) suggested by Adobe, CAPSL suggested by Canon or the like, is received through an input terminal 1. The received PDL image is then supplied to a discrimination circuit 2 from which characters and line pictures described in accordance with the line picture code are transmitted to a branch line 2a before it is developed to bit map information for each pixel by a bit map development unit 3.
On the other hand, image data in which pixels having gradation are arranged, such as a photograph, is transmitted to a branch line 2b. The bit map information such as characters, line pictures and the like and image data are synthesized in an image synthesis circuit 13 while being synchronized with each other. Then, the synthesized data is sectioned into blocks by a block formation circuit 9 before they are encoded by an encoding circuit 10. Then, the encoded data is stored as a compressed image in an image memory 14. The image stored in the image memory 14 is decoded by a decoding circuit 12 while being synchronized with an output device synchronous signal (omitted from illustration). Then, it is rastered by a raster formation circuit 7 before it is, through an output terminal 8, transmitted to an output device (omitted from illustration), for example, a page printer of an electronic photographic system. The above-described process of compressing the image by means of the block formation and the decoding process may employ, for example, a baseline system disclosed by JPEG (Joint Photographic Experts Group) as the international standard method of encoding a color still image.
However, a problem of deterioration in the quality of the line picture arises in the above-described conventional structure because the line picture which must possess a high resolution is also compressed similarly to an image having gradation (color). That is, characters and line pictures must be stored while priority is given to the resolution. On the other hand, photographs and graphs must be stored while priority is given to the gradation.
In general, texts must be stored while maintaining high resolution in order to maintain the smoothness and continuity of diagonal lines. On the contrary, images are stored while maintaining an excellent gradation in order to prevent the deterioration in the image quality due to the generation of a false profile. Therefore, the storage apparatus for storing an image of a mixture of image areas and text areas has been provided with a number of pixels, with which satisfactory resolution can be obtained to enable the grade of the text, that is, the smoothness and continuity of diagonal lines to be maintained. Furthermore, the storage apparatus has been arranged in such a manner that it possesses such number of gradations as to prevent deterioration in the image quality due to the image false contour.
However, a storage apparatus of the type described above has encountered a problem in that the size and the cost of the apparatus (hardware) cannot be reduced as desired because a great memory capacity is required with the increase in both of the number of pixels and the gradations for the purpose of improving the quality of each of the text and the image. In particular, when a full color image is stored, there arises necessity of providing three planes for red (R), green (G) and blue (B). Therefore, the required memory capacity is enlarged by three times. Assuming that the number of gradations for each of R, G and B planes is 256, the number of bits for each pixel, which is necessary to display the full color image, is 24. As a result, there arises a necessity of a large memory capacity which is 24 times the capacity required to display a monotone character (the number of bits for each pixel is 1).
The storage capacity required to store a half-tone image (hereinafter, called an "image") such as a photograph in a memory is (number of pixels).times.(number of gradation bits).times.(number of colors). In particular, a great storage capacity is necessary to store a high grade color image. Therefore, a variety of methods of compressing the quantity of information have been disclosed in order to reduce the required quantity of the memory by compressing the quantity of information before it is stored in the memory.
FIG. 25 is a block diagram which illustrates an encoding method ("Internationalized Encoding of Color Still Image", disclosed by Yasuda, pp.398-409, No. 6, Vol. 18 , 1989, published by the Image Electronics Society) of the Baseline System suggested by JPEG (Joint Photographic Experts Group) as the international standard method of encoding a color still image.
Image pixel data received through an input terminal 401 is sectioned into blocks each of which is composed of 8.times.8 pixels by a block formation circuit 403. Then, the block is subjected to a cosine transformation in a discrete cosine transformation (DCT) circuit 417 before the transformation coefficient is supplied to a quantizer (Q) 440. The quantizer 440 linear-quantizes the transformation coefficient in accordance with quantization step information supplied from a quantizer table 441. A DC coefficient among the quantized transformation coefficients is, by a predictive encoding circuit (DPCM) 442, subjected to a subtraction process in which the difference (estimated error) from the DC component in the previous block is calculated. The difference thus obtained is then supplied to a Huffman encoding circuit 443.
FIG. 26 is a block diagram which illustrates the detailed structure of the predictive encoding circuit 442 shown in FIG. 25.
The DC coefficient quantized by the quantizer 440 is supplied to a delay circuit 453 and a subtracter 454. The delay circuit 453 is a circuit in which the discrete cosine transformation circuit is delayed by one block, that is, by the time necessary to calculate data for 8.times.8 pixels. Therefore, the DC coefficient of the previous block is supplied from the delay circuit 453 to the subtracter 454. As a result, the subtracter 454 transmits the difference (predictive error) in the DC coefficient from the previous block (since the predictive encoding circuit 442 according to this embodiment uses the value of the previous block as the predictive value, the predictive encoding circuit 442 is composed of the delay circuit 453 as described above).
A one-dimensional Huffman encoding circuit 443, shown in FIG. 25, variable-length-encodes a predictive error signal supplied from the predictive encoding circuit 442 in accordance with the DC Huffman code table 444 so as to supply it, as a Huffman code, to a multiplexer circuit 451 to be described later.
On the other hand, AC coefficients (coefficients except for the DC coefficient) quantized by the quantizer 440 are zigzag-scanned by a scan conversion circuit 445 in ascending order as shown in FIG. 27 so as to be supplied to a significant coefficient detection circuit 446. The significant coefficient detection circuit 446 judges whether or not the quantized AC coefficient is "0". If it is "0", the significant coefficient detection circuit 446 supplies a count-up signal to a run length counter 447 so that the value of the counter is increased by one. If the AC coefficient is not "0", a reset signal is supplied to the run length counter 447 so as to reset the value of the counter. Furthermore, the coefficient is, by a group formation circuit 448, sectioned into group number SSSS and an additional bit as shown in FIG. 28. The group number SSSS is supplied to the Huffman encoding circuit 449, while the additional bit is supplied to the multiplexer circuit 451.
The above-described run length counter 447 is a circuit for counting a run length of "0"'s and as well as supplying the number NNNN of "0"'s present between significant coefficients except for "0" to a secondary-dimensional Huffman encoding circuit 449. The Huffman encoding circuit 449 variable-length-encodes the supplied run length NNNN of "0"'s and the group number SSSS of the significant coefficient in accordance with an AC Huffman code table 450 so as to supply them to the multiplexer circuit 451.
The multiplexer circuit 451 multiplies the DC Huffman code for one block (input pixels 8.times.8), the AC Huffman code and the additional bit so as to transmit compressed image data through an output terminal 452.
As described above, compressed image data transmitted through the output terminal 452 is stored in the memory, while the compressed image data is expanded at the time of the reading operation. As a result, the memory capacity can be reduced.
However, the above-described conventional structure possesses only one quantizing table 441 in the quantizer unit 440 thereof. Therefore, it has been difficult to improve the reproducibility of both of the line picture such as the character graphs and the half-tone image such as the photograph. That is, the character (line picture) must improve the resolution, while the half-tone image must improve the gradation.